Commander X16

While I am not going to post my efforts to learn enough VHDL to build a specification that can be fitted to the ATF1504, I've assembled the draft /PROM bootloader code to get ready for seeing about the bootloader part of that, using the Zeus Z80 assembler / IDE / emulator, and have the draft bootloa...

CPLD Pin inventory: The ATF1504 has four input pins, which are set up as Global Clear, Global Clock, Output Enable, and Global Clock2 / Output Enable2. PHI2 might be brought in on one clock input, and /MREQ and /Refresh on the output enable lines. Additional bus signal inputs required are /IOREQ, /W...

Two SPI Points I've mentioned the Z80 system using an SPI UART. However, the SPI circuitry described above is a "Mode3" SPI serial clock. Since the SPI interface is an ad-hoc interface rather than operating under a rigorous industry standard, it turns out that there are SPI devices made to...

The SRAM chip select select. This is one of the simplest components. The CPLD has the /PROM bit latched at an internal macrocell (it doesn't require an I/O pin if the /PROM function is internal to the CPLD). /MREQ and /RD are brought in for the /PROM circuit, and /A15 is brought in to latch the /PRO...

What are the potential hardware upgrades planned or available for the Commander X16 beyond the base configuration? I don't know whether that's been collected into a place. There are some expansion boards at TexElec m and there is a thread in the Official Announcements board on Gen-2 / Phase-2 / X16...

Maybe I missed something, but this sounds like you're restricting the Z80 system to 32KB. Why? If it's to gate the CPLD, that's not a very CP/M-like method. Because the Z80 version is a breadboard system to get a system along these lines up and running. If it does get up and running, there are plen...

Smuggling a PROM into a CPLD Really, the start of this brief return to my previous CP/M Card for the X16 idea, and the reason why this iteration is not littered with 74xx glue logic, was when I saw someone on 6502.org reporting on using a 22V10 as a PROM for a <32 byte bit bang UART boot-loader. I a...

Is it just the F9 key that is not working? (Haven't tried that myself yet) Just wanted to mention there is a register in the memory map which disables emulator key shortcuts: $9FB7. Just an idea if that flag might be set, although admkttedly it's unlikely to happen on accident https://github.com/x1...

An SPI bus for a minimalist Z80 system Now, with an FPGA or a big enough CPLD, it would be possible to implement an SPI bus driver that just had the CPU effectively write the output byte into a register, which starts the SPI bus driver in the process of outputting the high bit to the "Master Ou...

Is it just the F9 key that is not working? (Haven't tried that myself yet) Just wanted to mention there is a register in the memory map which disables emulator key shortcuts: $9FB7. Just an idea if that flag might be set, although admkttedly it's unlikely to happen on accident https://github.com/x1...