I thought about the whole situation for a bit more. I still think it's best to release the Phase 1 X16 first. About the next steps I'm not so sure any more...
1 hour ago, Cyber said:
Since it is all inside FPGA, is it possible to implement in X8 one more way to accces VRAM - the way it is in X16. Developer would be free to choose either use 256 byte window or 4 registers. I mean, if you already implemented 256 byte window, implementing 4 byte window along side should not be a problem. Thus way X16 programs would run on X8 without modifications.
Yes - this!
Regarding the X8: If it as the same VERA interface, then I will support it. Ok - I would have to throw away all the bespoke sound tracks for the YM 2151 I have sourced. But because of the limited RAM those would not be usable anyway, so my games then will be without any sound. Also graphics would have to be tuned down, and I personally won't make use of the double VRAM on the X16 in the future.
But I won't go into the hassle of supporting 2 different VERA interfaces. If I would, then there were different ways of addressing this, which I don't like:
Use wrapper functions: impacts performance.
Use conditional compilation (cc65) / macros (assembler): harder to maintain, makes code less readable, no impact on performance
Maintain different/mixed code bases: even harder to maintain, but also no impact on performance.
Yes all of the 3 options would work and also the additional effort is maybe not that big - but it is there and would take away time from the actual fun development.
If it is possible: integrate a YM2151 in fpga. So we would be able to use existing music trackers like Deflemask etc. Otherwise it will be hard to create high quality sound tracks. All the instruments and samples need to be recreated, for the YM everything exists.
So: please if you release the X8, then make it's VERA interface identical to the X16. And tune down the CPU speed to 8MHz. It would be so hard to explain why the little brother of the X16 is 50% faster. If possible integrate a YM2151 FPGA implementation.