The way it usually works on other ICs is, in addition to the address pins and the data pins, there's usually a chip select, a read, and a write pin. While chip select is asserted, each time there's a pulse on the "write" pin, the IC considers that a new write, so for example, if you set the address pins to $1234, the data pins to $56, and pulse the "write" pin 6 times, the IC will see that as $56 being written to address $1234 a total of 6 times (i.e., writing the same value to the same address multiple times).
I believe the VERA works the same way, just based on what I see from a cursory glance, but I don't know the timing specifics, nor how fast it can accept writes before they get dropped.