Commander X16 2023 update

[Robinkle]

• Because of the limitations of using obsolete FM chips, is it possible to implement it in the VERA chip?

As far as I'm aware, it's because the current FPGA they're using for the VERA hasn't got enough room. Can't remember where I heard that though.
I'm not sure how much space it would take but maybe the VERA could have some more advanced audio features added in lieu of an FM Synth? Maybe some wavetable channels like the SCC, Hu6280, FDS or Game Boy?

VERA is full. There's no more room for additional features. Wavetables or other synth models will need to be implemented as expansion cards.

This is true, I've heard this as well. Though, FPGA's comes in different sizes.

[BruceRMcF]

I've also heard it's true. But FPGA's comes in many sizes.

That's why Vera exists ... because an FPGA maker decided to put a 1Mbit RAM module into a commodity FPGA, so it could be done without requiring an FPGA with enough pins for an external Video RAM. That combination of an unusually large RAM component for an FPGA of that size -- and therefore relatively low cost -- is the foundation of the Vera design. Given that, it's not surprising that Vera is fully committed for I/O pins with a large majority of logic resources also committed.

But the Vera board is already designed for the FPGA that the Vera is implemented on. As the video points out, it's already too late for design suggestions that involve scrapping the board design and starting over from scratch.

They could indeed do a look around to see whether there is a suitable FPGA with an embedded 1Mbit RAM (in some form) for handing the Vera model, and also the FM core, and also the work done by much of the glue logic, and enough I/O pins to handle all of those roles, for the X16c board, which is more in the "early design" phase than the "final shakedown to determine if there are any tweaks required before proceeding to our first main release" phase.

But the X16 Dev board is in the final shakedown phase, and a change as major as upgrading to an entirely new FPGA, quite possibly in another FPGA family, seems like a bit beyond a final tweak.

[DragWx]

What the X16 board design already does with the FM chip is a good idea for the long term: the board has a provision for a YM2151-shaped component to be installed onto it, and it's up to the user whether they want to physically fit an original YM2151 IC, or to fit a modern replacement for it.

If I understand correctly, the VERA is designed to be a standalone component that isn't intrinsically tied to the X16, so I wouldn't consider it the VERA's responsibility to host an X16-specific feature, like the FM chip. It already has its very own PSG and digitized audio capabilities baked into it, and that's already plenty for anyone who needs an off-the-shelf solution.

Now, for G3, where everything is going to likely be on one big FPGA? That's a different story; the VERA would be one core of many cores that would be going on there.

[Robinkle]

I've also heard it's true. But FPGA's comes in many sizes.

That's why Vera exists ... because an FPGA maker decided to put a 1Mbit RAM module into a commodity FPGA, so it could be done without requiring an FPGA with enough pins for an external Video RAM. That combination of an unusually large RAM component for an FPGA of that size -- and therefore relatively low cost -- is the foundation of the Vera design. Given that, it's not surprising that Vera is fully committed for I/O pins with a large majority of logic resources also committed.

Sure can be. I haven't looked into which FPGA that is used, nor it's alternatives. Often FPGA's even come in difference capacities with the same footprint.

But the Vera board is already designed for the FPGA that the Vera is implemented on. As the video points out, it's already too late for design suggestions that involve scrapping the board design and starting over from scratch.

If I remember correctly, that was about using a Z80 on the X16. The vera chip is on a small daughter board, which also will be designed with IMDH port. So I guess it's not that late in it's design phase.

They could indeed do a look around to see whether there is a suitable FPGA with an embedded 1Mbit RAM (in some form) for handing the Vera model, and also the FM core, and also the work done by much of the glue logic, and enough I/O pins to handle all of those roles, for the X16c board, which is more in the "early design" phase than the "final shakedown to determine if there are any tweaks required before proceeding to our first main release" phase.

That's all I'm saying.

But the X16 Dev board is in the final shakedown phase, and a change as major as upgrading to an entirely new FPGA, quite possibly in another FPGA family, seems like a bit beyond a final tweak.

The VERA board can be made compatible with the X16 Dev board with any FPGA, the FPGA just has to be configured to function the same way with the same code. That's the beauty of FPGA's. Though I do see the cost issue. I wonder what would better. Using an FPGA replacement board for the FM chip. Or implement it on the VERA using a bigger FPGA?

[BruceRMcF]

I've also heard it's true. But FPGA's comes in many sizes.

That's why Vera exists ... because an FPGA maker decided to put a 1Mbit RAM module into a commodity FPGA, so it could be done without requiring an FPGA with enough pins for an external Video RAM. That combination of an unusually large RAM component for an FPGA of that size -- and therefore relatively low cost -- is the foundation of the Vera design. Given that, it's not surprising that Vera is fully committed for I/O pins with a large majority of logic resources also committed.

Sure can be. I haven't looked into which FPGA that is used, nor it's alternatives. Often FPGA's even come in difference capacities with the same footprint.

Yes. IIUC, the one the Vera is implemented in has an unusually large PSRAM module for such a modest logic capacity (and modestly priced) commodity FPGA.

But the Vera board is already designed for the FPGA that the Vera is implemented on. As the video points out, it's already too late for design suggestions that involve scrapping the board design and starting over from scratch.

If I remember correctly, that was about using a Z80 on the X16. The vera chip is on a small daughter board, which also will be designed with IMDH port. So I guess it's not that late in it's design phase.

I reckon if you listen closely, that response is not narrowly focused on the "why not switch to a Z80?" question alone, but is directed more broadly to sweeping changes.

They could indeed do a look around to see whether there is a suitable FPGA with an embedded 1Mbit RAM (in some form) for handing the Vera model, and also the FM core, and also the work done by much of the glue logic, and enough I/O pins to handle all of those roles, for the X16c board, which is more in the "early design" phase than the "final shakedown to determine if there are any tweaks required before proceeding to our first main release" phase.

That's all I'm saying.

If you are only talking about the "2nd Gen", aka X16c, that's different. From the outside, it seems like the really serious start of the X16c design process is when the X16 Dev Board design is locked down, so they may well be in the preliminary stage now when different options can be batted about.

But the X16 Dev board is in the final shakedown phase, and a change as major as upgrading to an entirely new FPGA, quite possibly in another FPGA family, seems like a bit beyond a final tweak.

The VERA board can be made compatible with the X16 Dev board with any FPGA, the FPGA just has to be configured to function the same way with the same code. That's the beauty of FPGA's.

But the Vera daughter-board doesn't presently handle the YM2151 functions, so it's chip select is not presently designed to trigger when the YM2151 is being written. And since the daughter-board block pin headers are directly designed for the daughter-board, and Vera is totally pin-constrained, there aren't likely to be any spare pins going into the daughter-board where they can solder in a bodge wire from the YM2151 chip select trace. Also, the pins don't exist to carry the digital information to the DAC for the OPM chip.

And of course, the YM chip is the only one with proper hardware envelope control. If the solo instrument gets four channel polyphony, and the background instruments two, you can still have three distinct FM instruments simultaneously, and with the low frequency oscillator you can have either volume or pitch vibrato on one of the channels.

Though I do see the cost issue. I wonder what would better. Using an FPGA replacement board for the FM chip. Or implement it on the VERA using a bigger FPGA?

But the Vera board plugs into the main board, and it is the main board that hosts the YM2151, and its DAC, and the circuit for accessing the YM2151, and the routine from the YM2151 DAC into the onboard audio mixer. If you are comparing for the X16 Dev board, then it's better using the FPGA replacement board, because that is the board that is for people who care about having the through hole DIP parts. At least that way, if someone can source an actual YM2151, they can replace it into the socket.

The reliance on an out of production part was never a very promising approach for the X16c, if it is intended to be an open-ended production run with as high a volume as the market will bear. Even if they were not having problem ordering a hundred good new-old YM2151's, they would be well advised not to design the X16c to rely upon that availability.

So the X16C should not be including a separate YM2151 chip in the design. The question for the X16c is rather whether to leave the Vera design alone and look to integrating some or all of the chip select logic into the FPGA containing the YM2151 core, or whether to migrate the Vera, the YM2151 logic, and whatever parts of the chip select logic it makes sense to add into a single, larger FPGA -- probably one with the I/O pins to support the entire address bus, whether in a single pass or in two clock cycle subphases supported by some fast latches.

That design choice rests on information lying far, far outside of the dribs and drabs of hardware knowledge I possess, so all I can do is to point to the fact that those two options may exist.

[TomXP411]

But the Vera board plugs into the main board, and it is the main board that hosts the YM2151, and its DAC, and the circuit for accessing the YM2151, and the routine from the YM2151 DAC into the onboard audio mixer. If you are comparing for the X16 Dev board, then it's better using the FPGA replacement board, because that is the board that is for people who care about having the through hole DIP parts. At least that way, if someone can source an actual YM2151, they can replace it into the socket.

Both VERA and the YM sit on 5-bit block boundaries, so if you were to pull the YM's CS line up to the VERA board with a jumper wire, the computer side of things stays the same. You'd just need an FPGA with more gates and at least as much RAM.

However, I'm betting that jumping to a larger FPGA would be far more than $10 more expensive.

[BruceRMcF]

But the Vera board plugs into the main board, and it is the main board that hosts the YM2151, and its DAC, and the circuit for accessing the YM2151, and the routine from the YM2151 DAC into the onboard audio mixer. If you are comparing for the X16 Dev board, then it's better using the FPGA replacement board, because that is the board that is for people who care about having the through hole DIP parts. At least that way, if someone can source an actual YM2151, they can replace it into the socket.

Both VERA and the YM sit on 5-bit block boundaries, so if you were to pull the YM's CS line up to the VERA board with a jumper wire, the computer side of things stays the same. You'd just need an FPGA with more gates and at least as much RAM.

I wasn't very clear the way I wrote that -- I was imagining a bodge wire going to the extended block pin header that the revised Vera daughter-board would plug into. Presuming that there is room ... I haven't looked closely at the latest prototype to see whether there is even room to extend one or both of the block pin headers.

Even worse, since the YM2151 and its DAC is a set, and if you cannot assume that the YM2151 is available you cannot assume that its dedicated DAC is available, so you couldn't just bring out digital outputs from the FPGA, you'd need to do a DAC on the daughterboard so now you are sending the YM analog audio lines through to the mixer on bodge wires so somewhere on the audio out traces from the OPM's DAC.

However, I'm betting that jumping to a larger FPGA would be far more than $10 more expensive.

This seems to be getting up to the level of FPGA that are used for the Feonix256 boards, and they work on the basis of external side video RAM, with a 16bit data bus to increase the throughput between the FPGA and the external RAM.

Given that the X16 team strategy has been to only use FPGA as a last resort, I like that Vera is based on literally the least expensive, smallest logic resource FPGA in current production that would allow meeting the video chip design goals. When saying "why not use a bigger FPGA", there isn't any obvious stopping point ... there will always be a more expensive, more capable FPGA, and if there isn't one at present, then shortly one will be introduced. But when saying "why not use a smaller FPGA", AFAIUm that has a definite answer -- AFAIU, there isn't a cheaper FPGA in production that has an embedded 1MBit SPRAM module.

If ifs and buts were candies and nuts, we'd all have a Merry Christmas, but in retrospect, when it came out that there wasn't a suitable 8bit data bus FM chip in production, they should have gone with an out of production part that was in wider use to have a broader grey market, like the OPL2. But they didn't, and to me, rather than redesign the whole system and change the FPGA that Vera targets, its better to leave the Development Board so that it can take a real OPM chip set if the owner can get their hands on one.

[TomXP411]

Even worse, since the YM2151 and its DAC is a set, and if you cannot assume that the YM2151 is available you cannot assume that its dedicated DAC is available, so you couldn't just bring out digital outputs from the FPGA, you'd need to do a DAC on the daughterboard so now you are sending the YM analog audio lines through to the mixer on bodge wires so somewhere on the audio out traces from the OPM's DAC.

There's no reason to do that. VERA already has a DAC. An FM VERA would just make use of that.

As far as external equipment (not the FPGA itself), all that has to change is the one CS wire. You'd simply leave the FM components on the motherboard unpopulated: no op-amp, DAC, or YM chip. In that scenario, all of the audio comes through VERA's DAC: FM, PSG, and PCM audio.

Of course, we're back to the big problem - as you say, the FPGA itself is a big hurdle. So this discussion is academic, anyway.

[c64c46c]

Well done. Not having this video go live on April 1st, and in fact the day before, was a wise decision. I have nightmares about cringingly hacking on old "Chicken Lips. Like finger nails in your oatmeal as someone once said about something else.

[grml]

cringingly hacking on old "Chicken Lips.

Why does "Chicken Lips" come up so often here? I never heard the term before, only in the context of the CX16, and now I've looked it up and it's a racist slur against white people. Weird as fuck.