13 hours ago, paulscottrobson said:
I always thought it a shame that Stefany and David didn't join forces. Stefany's an awesome engineer ; she's done a huge amount all by herself on the hardware. David is more software, is great at the 'team building' sort of stuff, has a much bigger audience. It's hard going being a one woman hardware machine - and of course there's always the possibility (god forbid) that Stefany could have a mishap or other external events which would probably kill the project. Even if the hardware is open sourced much of it is in her head I suspect.
I recall from "Dream Computer #1" that they talked about it and some retro meet somewhere, but they were too far apart, this being David's mark one design - the cheap $50 design with minimal hardware.
CX16 has moved much closer to Stefany's sort of design in many ways, as more and more has gone on the FPGA, there's the 6502 RAM/ROM and one of the sound chips (?) and a VIA and most else is in the FPGA. Which isn't far from the Foenix design (though I think it may have DMA, not sure without checking).
Too late now, I suspect, to combine forces.
I can see why she's produced a redesign but it's in danger of fragmenting the fairly small community.
It has a bucketload of DMA, since there is a DMA handler for system memory and a DMA handler for video memory ... Video RAM is, AFAICT, static RAM and the way she gets the bandwidth she needs to layout up 32 sprites and four text/tile layers and two bitmap layers on a 14MHz bus is to access 32bits at once with four 1Mx8bit SRAM chips accessed in parallel by the Video FPGA, Vickey.
As a side note, when you are tallying the "non-FPGA" parts of the CX16 system design, you are skipping all of the addressing logic in the CX16p being done with glue logic, and all the system resources handled by the other VIA (assuming your count of a VIA is the mostly free VIA available on the User Port). Also the 8bit, through pin PS microcontroller they added.
I reckon the design that was abandoned before the current 64K memory map was settled on was a lot closer to Stefany's sort of design, it apparently had three or four FPGA's or CPLD's of various sorts. It would have had one FPGA or CPLD grabbing the high byte from the data bus of the 65816, which would have been doing some of the work of Gavin on the Feonix.
However, one similar feature was having the PCM / CODEC at up to 48KHz frequency on FPGA (though in the separate sound FPGA in the Feonix), though of course the Feonix has the System RAM DMA to feed it, and they both also have a "SID like" sound generator ... the Feonix being much closer with an FPGA stereo SID simulator except without the analog filters, in the CX16 with it's "it's kind of SID like if you squint" 16 channel PSG with NEITHER ADSR nor filters.
[However, even with combining FPGA chips in the U (and I would suppose, the GenX), the Video generator and Sound master/generator "custom chips" in the Feonix are still different chips ... so the Video RAM DMA and system RAM DMA are still in different FPGA ... rather than the Video and Sound generator combined into a single "custom chip" in the CX16.]
Stefany's "U" design is also moving toward the CX16 Vera in having an FPGA SD card interface, AFAICT to allow the "U" design to make the Super I/O chip an optional extra.
I would have personally preferred the AY3's and have the Vera chip handle the feeding of data to the AY3's if they couldn't work out glue logic to do it, ditching the PSG, which AFAIU would have been closer to Stefany's original Beatrice FPGA, but alas, and alack, it was not to be.
(Edit) Before I forget, the sound FPGA Beatrice can trigger the sound chips it controls simultaneously, which is a lot stronger assurance of no perceptible lag than "well, there IS a lag but hopefully it's not perceptible.' If you see reference to Gabe, that is the single FPGA that merge the functions of the system master FPGA Gavin and the music master FPGA (mistress?) Beatrice.