On 8/11/2022 at 10:50 AM, ZeroByte said:
If there were legs available, you could just wire them to a data port on VIA1 and have them as "data waiting" bits that only requires 4 cycles to read (assuming nobody has futzed with the DDR on VIA1)
Yes. if it was me, I would use one of the VIA(#?) PortB pins freed up -- by not putting PS2 KBD/Mouse on the VIA -- as a VIA input /ACK with a pull up resister to +VCC (so on power up it will read as 1), another as an VIA output /ALERT, and two more VIA outputs as MODE1/MODE0 to select one of four modes (IDLE, Data Write, Data Read, Address Write), and connect 8 GPIO to the data bus, with the MCU setting them up as Inputs (including when Idle) or Outputs as appropriate. That's 12 GPIO, 4 more for the two PS2 ports is 16, and the ATX power supply pins seems to me{*FN} like it would fit in a 22 GPIO model of ATTiny.
But also, it it was me, I'd just use the I2C that they in any event need for the RTC ... it's a computer talking with People over the PS2 ports, so they really AREN'T time critical the way that talking to a video card etc. would be. That would free up more pins for the User Port, allowing for a parallel port AND a half-bit banged SPI with the User Port VIA Serial Shift Register ... or a partially bit banged serial port with hardware flow control if taking the PS2 off of the VIA frees up the system VIA serial shift register so both serial shift registers are available for really flexible serial oriented user port #2.
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{*Footnote: But what in the Sam Hill do I know? This is all hardware, and to the extent that I'm anything, I'm a software guy.}