That is a perfectly valid function of the RDY pin. A bidirectional pin for use by DMA controllers is fair to use as a bidirectional pin by DMA controllers. This isn't a controversial position.spargue wrote: ↑Thu Jun 29, 2023 3:34 pm
That's not the function of the RDY pin. You should read the posts further back as to why the card is reading $0001.
The issue is the sequence of operations to enter / exit an interrupt / bank switch and whether the card can do so whenever or if it needs a specific preamble sequence to allow mastering. If the ISR is relying on the RAM $0001 to be a shadow of the latch state is there a specific hazard where a card can jump in and mess with it thus violating the shadow state? the ISR is assuming the latch is still $00 and the RAM $0001 is the old value; but if a bus master occurs during this sequence that does its own bank sequence, then the latch is no longer $00 but the old value.
I think there may be a flaw in your reasoning and you are missing something critical. Looking at the IRQ's first few instructions:
Code: Select all
__irq:
pha
lda rom_bank ;save ROM bank
pha
stz rom_bank ;set KERNAL bank