On 1/7/2021 at 5:52 PM, Cyber said:
@lamb-duh @TomXP411 Ok, so I/O latches usually are physically outside the main RAM. We also call these latches "device registers". When we access them programmaticaly we actually don't care how they implemented physically, we just read or write I/O address in memory, thus communicate with device.
But speaking physically - what are these latches (registers) are? Is it internal part of actual device? Or is it just another separate RAM-like chip somewhere on board? Or it might be one or another?
Note that sometimes there ARE no registers, and the data lines drive logic directly when that address is written to. You might have a 2 to 4 decoder, connect the device select to the chip select for the decoder, a0 and a1 to the decoder input, and then $00-$03 inside the device address space generates four different select lines. Some of those select line might select logic chips to make use of the data input directly. If there are pull down resisters on those data lines, if it is read back, it would always return a $00, because the lines are essentially output only when the logic circuit is selected.
Or sometimes there is a write-only register and if your program needs to know what is in the register, it has to store the value itself, because it cannot be read.
it is possible that not all the address lines are connected ... you have a chip with two address lines, so you connect the device select line, a0 and a1, and $04-$07, $08-$0B, etc. all act like mirrors of $00-$03.
A lot of devices let you read register values back, because it's so handy ... and avoids errors when a software shadow register value is out of sync with the actual register ... but it is entirely the design of the chip or circuit that decides whether it does that.
