Commander X16

With the ACIA dropped from the design, I gather that the plan is that the foundation serial port option is bit banging the VIA on the User Port. The C64 bit banging the CIA on a 1MHz bus was used to support Commodore's 1200baud mode, and that approach could be pushed to 2400 baud, but not further, while using the serial shift registers allowed operating at 9600baud.

Presuming the equivalent of the enhanced bit-banging routines are used, that implies somewhere between 9600 and 19200 baud on a bit-banging serial port, while a VIA dual serial shift register approach could hit the maximum landline modem speed of 5600baud.

Of course, without hardware flow control and with no hardware FIFO, the faster you go the more risk of dropped data, so just as a guesstimate perhaps 4800-9600baud reliably with bit banging and 19200-38400baud reliably with the VIA serial shift registers.

That suggests the simplest serial card would be a card with a 3rd VIA on it, and splitting off the serial shift register from the User Port onto a separate block pin header from the parallel port, so a ribbon cable from the card to the existing VIA#2 serial shift register lines would support a VIA hardware serial port.

Of course, even taking the remaining serial port  handshaking lines from Port B of the expander card VIA, there would still be plenty of lines to support a second EPP parallel port (which fortunately doesn't require as many lines as a original parallel port).



References:

UP9600 code: https://github.com/bozimmerman/Zimodem/blob/master/cbm8bit/src/up9600.asm

Example 9600 interface (UK): https://www.simulant.uk/shop/Commodore64-Commodore128-User-Port-to-rs232-Adaptor-C64-C128-to-9-Pin-Serial

Example 9600 WiFi modem: http://www.codingkoala.com/kc64wifi/

The ACIA was never in the design because CIA chips haven’t been made since the C64/Amiga days.  The VIA has a working shift register. However it has to be compatible with real legacy devices so if still has to follow the timing rules. So it really doesn’t matter what the theoretical speeds are. In theory you can go faster with custom routines in both devices.  For networking you probably aren’t going to want to use the serial port. There will be software supported lines on the user port for RS232. Alternately you can use a proper network interface card which should be capable of 128kbps or higher.   Sent from my iPhone using Tapatalk

What about 

 

 https://www.westerndesigncenter.com/wdc/documentation/w65c51n.pdf

13 minutes ago, Arpman said:

What about 



 



 https://www.westerndesigncenter.com/wdc/documentation/w65c51n.pdf

It seems to have serious bugs that make it unusable. Similar, bug free, chips are no longer manufactured. Bugs me too, it would be the ideal solution. There will probably be addon cards, or kits eventually. I will most probably make one based on that chip.

There are multiple UART options that are better than the 6551. There are ones that are faster, have more features, some even have multiple UARTs, and they are less expensive as well.


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3 hours ago, Lorin Millsap said:

The ACIA was never in the design because CIA chips haven’t been made since the C64/Amiga days.



The VIA has a working shift register. However it has to be compatible with real legacy devices so if still has to follow the timing rules. So it really doesn’t matter what the theoretical speeds are. In theory you can go faster with custom routines in both devices.



For networking you probably aren’t going to want to use the serial port. There will be software supported lines on the user port for RS232. Alternately you can use a proper network interface card which should be capable of 128kbps or higher.

It's not clear what the status of the CIA, the MOS 6522 Complex Interface Adapter ... the version of the MOS 6522 family that fixed the bug in the MOS 6522 VIA ... would have to do with the status of the Asynchronous Communication Interface Adapter, the 6526, where the currently available cmos wdc65c26 version has a bug of it's own in its hardware flow control.

It's also a little obscure what the second remark means to say, as the constraint on the speed of the bit banged serial user port was bus speed and processing power. It would be remarkable if "being compatible with real legacy devices" did not permit it to be two to four times faster. Obviously real legacy devices exist with speeds of 9600baud, 19200baud, 38400baud and the landline telephone bandwidth cap speed of 56000baud. Those are all quite common RS232C data transmission rates.

And as for networking? I do indeed want to use the serial port and a Wifi232 type WiFi interface ... there's no way I am going to buy a CX16 specific internet card when I can readily get something that will work with any retro system with a serial port that supports Hayes AT command syntax. That flexibility is one of the features that makes them so popular.

The reference to the ACIA 6526 was a reference to the earlier description that the system would be including it as a serial chip, which went by the wayside due to its bug and whatever toing and froing y'all did over it behind the scenes ... which happily with this project isn't done in public so I don't worry about. It wasn't lamenting that the ACIA was not going to be included.

But CX16 the system is not all that well endowed with GPIO, and a card that provided a serial port by using the free serial shift register in the User Port and a third VIA would not only be really cheap, but also bring the usable amount of GPIO up to a much more respectable level.

It's not clear what the status of the CIA, the MOS 6522 Complex Interface Adapter ... the version of the MOS 6522 family that fixed the bug in the MOS 6522 VIA ... would have to do with the status of the Asynchronous Communication Interface Adapter, the 6526, where the currently available cmos wdc65c26 version has a bug of it's own in its hardware flow control.
It's also a little obscure what the second remark means to say, as the constraint on the speed of the bit banged serial user port was bus speed and processing power. It would be remarkable if "being compatible with real legacy devices" did not permit it to be two to four times faster. Obviously real legacy devices exist with speeds of 9600baud, 19200baud, 38400baud and the landline telephone bandwidth cap speed of 56000baud. Those are all quite common RS232C data transmission rates.
And as for networking? I do indeed want to use the serial port and a Wifi232 type WiFi interface ... there's no way I am going to buy a CX16 specific internet card when I can readily get something that will work with any retro system with a serial port that supports Hayes AT command syntax. That flexibility is one of the features that makes them so popular.
The reference to the ACIA 6526 was a reference to the earlier description that the system would be including it as a serial chip, which went by the wayside due to its bug and whatever toing and froing y'all did over it behind the scenes ... which happily with this project isn't done in public so I don't worry about. It wasn't lamenting that the ACIA was not going to be included.
But CX16 the system is not all that well endowed with GPIO, and a card that provided a serial port by using the free serial shift register in the User Port and a third VIA would not only be really cheap, but also bring the usable amount of GPIO up to a much more respectable level.

There is no currently available 6526. If you look in their list of chips, the 6526 is absent.

The constraint on the IEC bus speed is limited by the processing power of the legacy devices. Sure in theory the x16 can do higher speeds, but only if it was talking to a device that was as fast as the x16. Since no such device exists, what’s the point?

Because of the way the IEC is wired there really isn’t a way to use it differently.


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It seems to have serious bugs that make it unusable. Similar, bug free, chips are no longer manufactured. Bugs me too, it would be the ideal solution. There will probably be addon cards, or kits eventually. I will most probably make one based on that chip.

Do you have a link to the known bugs for the wc65c51 chip?


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On 7/5/2020 at 12:57 AM, Lorin Millsap said:

There is no currently available 6526. If you look in their list of chips, the 6526 is absent.



The constraint on the IEC bus speed is limited by the processing power of the legacy devices. Sure in theory the x16 can do higher speeds, but only if it was talking to a device that was as fast as the x16. Since no such device exists, what’s the point?



Because of the way the IEC is wired there really isn’t a way to use it differently.

Sorry, brain fart, the ACIA is of course the 65c51.

I wasn't discussing adding another IEC bus port, I was referring to adding a serial port.

I know that the IEC bus is a serial bus, but it would be utterly confusing to talk about the IEC bus as "adding a serial port". And since the IEC is a daisychain bus, there's no point in adding another one when what is missing is a regular serial port.

Since an RS232C serial port can be provided at 9600bps using the C64 user port and the Serial Shift Registers from both of the C64 CIA's on a 1MHz bus, I don't think it is at all unreasonable to hope that if the free 65c22 VIA serial shift register from the User port is added to  both parallel ports and the serial shift register from an expansion card 65c22 VIA, the serial port might support 38.4K or 56K on an 8MHz bus, for one serial port and two EPP capable parallel ports, one compatible with the original PC parallel port.

One serial port and two parallel ports may well do me.

Indeed. Until we do more testing we don’t know what speeds will be possible. Ultimately for most uses the speed may not be highly relevant.


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