What address does the new scroll screen have to describe please.

[funkheld]

Hi good afternoon.

I'm amazed at what this x16 can do.
with which address can I please describe screen 0 with text that scrolls?

Thanks.
greeting

-----------------------------
sub sr() {
z=z+1
poke($9F37,z)
}

sub sl() {
z=z-1
poke($9F37,z)
}
--------------------------

[hstubbs3]

What address would you like to use ?

https://github.com/X16Community/x16-doc ... ference.md

The VERA can be configured with Layer0 and Layer1 at any address divisible by 512 .. .

Layer0 as example has registers -
$9F2D L0_CONFIG Map Height Map Width T256C Bitmap Mode Color Depth
$9F2E L0_MAPBASE Map Base Address (16:9)
$9F2F L0_TILEBASE Tile Base Address (16:11) Tile Height Tile Width
$9F30 L0_HSCROLL_L H-Scroll (7:0)
$9F31 L0_HSCROLL_H - H-Scroll (11:8)
$9F32 L0_VSCROLL_L V-Scroll (7:0)
$9F33 L0_VSCROLL_H - V-Scroll (11:8)


so only 1 Byte to desribe map base address = 128K/256 = 512bytes
TileBase ( where your character set would be kept in VRAM) has to be at address divisible by 2K because only 6bits are devoted to describing the address..

to actually do the scrolling you write to the relevant scroll registers - I'd assume the prog8 libraries have these defined as constants somewhere.

to see where the current L0 screen is in VRAM use vpeek $9F2E and shift left by 9 bits..(its 17bit address)

L1 registers are just above that
$9F34 L1_CONFIG
...
$9F3A L1_VSCROLL_H


....

be sure the layers you want are enabled! One can enable/disable sprites, layer0, and layer1 independently by changing bits in
$9F29 DC_VIDEO (DCSEL=0)
Current Field Sprites Enable Layer1 Enable Layer0 Enable NTSC/RGB: 240P NTSC: Chroma Disable / RGB: HV Sync Output Mode

(note you want to be sure you maintain bits set for your output or you'll turn your display off! )

[funkheld]

I'm looking for the start address of the screen that is pushed in from the right or the start address if the new screen is pushed in from the left.


I did that with prog8
see my two pictures.
----------------------------
to actually do the scrolling you write to the relevant scroll registers - I'd assume the prog8 libraries have these defined as constants somewhere.
------------------------------

------------------------------
sub sl() {
z=z+1
poke($9F37,z)
wert=cx16.vpeek(0,$9F2E)
txt.print(" ")
txt.print_uwhex(wert, true)
}
-----------------------------

what does the address $0037 mean?
The address changes every time you restart.


Thanks.

[hstubbs3]

$0037 mean?

You're peeking Layer0 Map Base address register -
$9F2E L0_MAPBASE Map Base Address (16:9)

and getting $0037 ? its only one byte value - am guessing should mean $37 ...
because the value in $9F2E is bits 16:9 counted from the right ... IE -
$9F2E bits = 7 6543210
layer0 map address = H FEDCBA98 76543210 ...
so ... shift left 9 total... basically shift left once to get high byte, if there is carry then VRAM address bank is 1 .
$37 << 1 = $0 6E
topleft of Layer0 data should be at $06E00 in VRAM

depending how prog8 libraries allocate data in VRAM, that could vary between runs. If it is managing it for you, then it is likely the current configuration should be exposed somewhere in some variables or constants you can reference within your program, rather than needing to find it yourself.

One reason this might change is in case of double-buffering => one could have currently displayed buffer in VRAM at $06E00 , and build next screen at say $16E00 ... Then when next screen is ready, just need to update $9F2E to new base address to swap the buffers.

[funkheld]

Hi good afternoon.

Thanks for the information.
I'll think it through again

Thanks.
grudd

[funkheld]

Hi good afternoon.

I'm sorry.
I can't find the addresses to fill the scrolling screen. At 75 years old, my technical expertise is not sufficient.

Thanks.
greeting

[DragWx]

In SCREEN 0 mode, the screen memory is actually 128 columns and 64 rows, but the Kernal only uses 80 columns and 60 rows of it. To use the rest of the columns and rows, you need to poke VRAM directly. Calculate the address as though a row is 128 characters and attributes.

[hstubbs3]

128 characters across tile mode means each line in VRAM is 256 bytes ...

The default BASIC type screenmode actually uses the 1BPP tile mode... each tile is defined as 2 bytes -

Offset Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 Character index
1 Background color Foreground color


base_address + line_num*$0100 + col_num*2 => character to draw.
base_address + line_num*$0100 + col_num*2 + 1 => colors to set.


You provided actually the memory map Kernal mode uses in a different thread..
viewtopic.php?p=32152#p32152

Which I'm not sure where is documented... but looks about what I recall from my early days with the system, before I just went ahead and redefined where everything was in the VERA.

Your info had this -
text layer base address - $1:B000

So ... address $1B050 would be the first character to the right of the 80 cols screen
and $1B051 is where you would set its colors...

then address $1B150 for the next line...

Cheers

[funkheld]

Hmmm...
I actually meant where the addresses begin on the screen that was attached.

Thanks.
greeting

[TomXP411]

Hmmm...
I actually meant where the addresses begin on the screen that was attached.

Thanks.
greeting

It's in the manual.

https://github.com/X16Community/x16-doc ... ace-layout